The PC202 SoC brings the massively parallel signal processing capabilities of the picoArray (for L1 PHY) and the ARM9 technology (for L2/L3 stack) to deliver a complete software-defined WCDMA modem in a single device.
The PC202 is available in two versions. The standard device integrates a 248-element picoArray and 280MHz ARM926EJ-S processor with application accelerators for forward error correction, FFT/IFT, security and encryption. An enhanced (-10) version with a larger, 273-element picoArray provides extra processing headroom, allowing designers to implement value-added features and differentiate their end products. Both variants include a complete DDR-II DRAM controller and a flexible interface for the radio and RF sections.
The devices’ integrated ARM9 subsystem provides a high performance processor core allowing implementation of control code such as that required for MAC functions for access points and mesh network nodes. The ARM9 subsystem includes large on-chip memory, cache, and high performance interfaces to the picoArray and external bus interfaces.
| Part | Description | Package | Pin Count | Status |
|---|---|---|---|---|
| PC202-PBC | 2nd Gen. picoArray + ARM9 | PBGA | 672 | ![]() |
| PC202-PBC-10 | PC202 with extra row of picoArray | PBGA | 672 | ![]() |
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