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CX28500
1,024 Channel HDLC Controller with PCI Interface
Overview
Description
The CX28500 is an advanced multichannel synchronous communications controller. This highly-integrated, cost-effective and monolithic device supports up to 1,024 bidirectional High-level Data Link Control (HDLC) channels, mapped via 32 independent serial ports. It has a throughput of 550 Mbps with eight HSSI ports running 52 Mbps each.
Features
- Single-chip multichannel HDLC controller with a 66 MHz, 32-/64-bit PCI 2.1 compliant bus for configuration, monitoring, and transfer of packet data
- 500 Mbps full-duplex throughput
- Per-channel DMA buffer management
- 64 Kbytes of on-chip memory for partial packet buffering
- 32 independent serial interfaces
- Per-channel protocol mode selection
- Selectable Endian configuration
- 2.5V core, 3.3V I/O with 5V tolerant inputs
- JTAG boundary scan test support
Documentation
- Hardware Design Docs
- IBIS Files
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101341A.ibs (156.02 KB)
September 25, 2000
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101341A.ibs (156.02 KB)
- EVM / Reference Design Guides
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EVM User Guide (182.38 KB)
January 1, 2000
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EVM User Guide (182.38 KB)
- Errata / Non-Conformance
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M28500 EVM Errata (35.85 KB)
May 14, 2003
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M28500 EVM Errata (35.85 KB)
- PCNs
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Test Site Transfer PCN (27.57 KB)
July 14, 2009 -
Test Site Transfer for CX28500, M28525, and M28529 Products PCN (31.07 KB)
September 9, 2009 -
28xxx Test Location Change PCN (28.89 KB)
October 11, 2010
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Test Site Transfer PCN (27.57 KB)
- Product Bulletins
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CX28500 Product Bulletin (42.18 KB)
October 5, 2006
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CX28500 Product Bulletin (42.18 KB)
- Data Sheets
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CX28500 Multichannel Synchronous Communications Controller (1.65 MB)
October 16, 2006
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CX28500 Multichannel Synchronous Communications Controller (1.65 MB)
- RoHS/IPC Report
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M28500-12 IPC Report (1.62 MB)
April 13, 2011 -
CX28500G-12 IPC-1752-2 v1.1a ASAT Au (404.36 KB)
April 29, 2013
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M28500-12 IPC Report (1.62 MB)
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