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M27483
TSP3 - Core/Edge Network Processor
Description
The M27483 is based on a third generation traffic stream processor architecture (TSP3) and is targeted for a variety of programmable traffic management and Layer 2 interworking functions. Unlike fixed-function traffic management devices, new features can be introduced with a software upgrade making M27483 TSP3-based hardware deployed in networks "future-proof" to evolving requirements.
The M27483 device supports a broad set of applications that allows "common card" hardware to be used interchangeably for ATM, POS, Ethernet, EoS, next-generation SONET, IMA and Frame Relay designs. In addition, all devices within the TSP3 family are software compatible, promoting design reuse across applications, port speeds and vendor platforms.
Features
- Programmable traffic management and Layer 2 interworking processor
- Software compatible with entire family of TSP3 devices
- Supports up to 64K packet or cell streams
- Supports fine-grained packet and cell traffic management on up to 256K traffic streams:
- Queuing
- Hierarchical shaping and scheduling
- Policing
- Switching
- Congestion management
- Complete off-the-shelf PortMaker™III software applications and source code licenses are available
- EVM, comprehensive toolset, and consulting services
- Layer 2 interworking functions include, but are not limited to:
- Transport of Layer 2 frames over MPLS
- IP-to-ATM
- Ethernet-to-ATM
- Frame Relay-to-ATM
- IMA
- Sales / Marketing
- Product Briefs
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M27483 Product Brief (508.59 KB)
May 25, 2004 -
TSP3 Traffic Stream Processor Family Product Brief (444.14 KB)
September 27, 2006
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M27483 Product Brief (508.59 KB)
- Hardware Design Docs
- Product Bulletins
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Alert Information-Lid Adhesion on FCBGA Products Product Bulletin (46.22 KB)
August 28, 2009
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Alert Information-Lid Adhesion on FCBGA Products Product Bulletin (46.22 KB)
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