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M28228

27mm & 17mm Octal ATM PHY Solution (Not Recommended for new designs)


Overview

Description

Mindspeed's M28228 dramatically improves performance for switch and access system low-speed ports, by integrating all of the ATM physical layer processing functions found in the ATM Forum Cell-Based Transmission Convergence Sublayer specification for eight individual ports. All ports can be independently configured for operation at speeds ranging from 64 Kbps to 50 Mbps, and each TC port has a power-down mode. A UTOPIA Level 2 multi-PHY interface connects the M28228 to the host switch or terminal system and concentrates the ATM cell traffic onto one interface.

Features

  • Integrated 8 port solution, each port is individually configurable for low-speed (T1/E1, T3/E3, xDSL) data inputs
  • Programmable bit- or byte- synchronous serial interfaces
  • Microprocessor interface (8-bit data bus for accessing available read/write registers
  • UTOPIA Level 2, multi-PHY addressing cell-bus interface supports up to 31 PHYs
  • Supports all ATM physical layer cell-alignment processing functions
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