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M29306
6-Port DS3/E3/STS-1 Integrated Line Termination Device for ATM, Packet Processing and TDM Transport Networks
Overview
Description
The M29306 provides the most complete physical-layer solution for flexible DS3/E3/STS-1 ATM, packet and TDM services on a single chip. The M29306 aggressively drives down cost for existing solutions and as well as reduces PCB real-estate and power
Each port of the M29306 operates independently allowing for a mix of different rates and protocols. This flexibility allows service providers to provide a combination of clear channel DS3/E3 for packet, DS3/E3 ATM UNI or T3/E3/STS-1 TDM services on the same card. This enables ADMs/OEDs and MSPPs to deploy a single line card that supports the simultaneous mapping for SDH or SONET transport of both DS3 and E3.
Features
- High integration - LIUs with DJAT, T3/E3, STS-1 framers/mappers, STS-12/STM-4 framer, ATM & HDLC processors
- Flexibility - mix ATM, TDM and packet as well as T3, E3 and STS-1 services on one device
- ATM/packet interfaces:
- SPI-3 8-bit 25-104 MHz
- UTOPIA Level 2/POS-PHY Level 2, 16-bit 25-50 MHz
- Fractional T3/E3 support
- Comprehensive loopbacks
- Easy implementation - TAP software + high integration = faster time-to-market
- Parallel 8-bit, 77.76 MHz TDM telecom bus
- T3/E3/STS-1 payload access
- Embedded CLADs for supported line rates
- Pattern generator/detector for BERT
Documentation
- Sales / Marketing
- Product Photos
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M29306 Chip Shot (High Resolution) (682.78 KB)
June 2, 2004 -
M29306 Chip Shot (Low Resolution) (141.11 KB)
June 2, 2004
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M29306 Chip Shot (High Resolution) (682.78 KB)
- Product Briefs
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M29306 Product Brief (505.37 KB)
June 3, 2004
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M29306 Product Brief (505.37 KB)
- Hardware Design Docs
- PCNs
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M293xx Test Location Change (28.47 KB)
October 6, 2010
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M293xx Test Location Change (28.47 KB)
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